Semiconductor device

A semiconductor device comprising:

• a first transistor that flows a load current to an external load;
• a second transistor coupled in parallel to the first transistor;
• a current generation circuit that outputs a current corresponding to a power consumption generated in one of the external load and the first transistor when the load current flows the one of the external load and the first transistor;
• a resistor-capacitor-network comprising a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance of the one of the external load and the first transistor, and having one end coupled to the current generation circuit;
• an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network;
• and
• a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage,
• wherein the current generation circuit comprises;
• a current mirror circuit outputs, as a first and second output, a current corresponding to a current flowing through the second transistor;
• a third transistor that is coupled to the first output and is controlled in response to a drain-source voltage of the first transistor;
• and
• a fourth transistor that is coupled to the second output and is controlled in response to a drain-source voltage of the first transistor, and
• wherein a combined current of output currents of the third and fourth transistors is outputted as a current corresponding to the power consumption of the first transistor.

A semiconductor device, comprising:

• a first N-channel transistor that supplies a load current to an external load;
• a second N-channel transistor coupled in parallel to the first N-channel transistor;
• a third N-channel transistor whose drain is coupled to a source of the second N-channel transistor;
• a differential amplifier whose non-inverting input is coupled to a source of the first N-channel transistor, whose inverting input is coupled to the source of the second N-channel transistor and whose output is coupled to a gate of the third N-channel transistor;
• a current generation circuit that is coupled to a source of the third N-channel transistor and outputs a current corresponding to a power consumption generated in the external load;
• a resistor-capacitor-network comprising a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance of the external load, and having one end coupled to the current generation circuit;
• an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network;
• a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage;
• and
• a first switch coupled between the connection point of the current generation circuit and the resistor-capacitor-network and the voltage source,
• wherein the external load includes a load and a wire harness coupled between the load and the semiconductor device, and
• wherein the current generation circuit comprises:
• a first current mirror circuit coupled to the source of the third N-channel transistor;
• a second current mirror circuit coupled to the first current mirror circuit and having a first and second outputs;
• a first P-channel transistor whose source is coupled to the first output of the second current mirror circuit and whose drain is coupled to the one end of the resistor-capacitor-network;
• a second P-channel transistor whose source is coupled to the second output of the second current mirror circuit and whose drain is coupled to the one end of the resistor-capacitor-network;
• a first comparator whose inverting input is coupled to the source of the first N-channel transistor, whose non-inverting input is coupled to a first reference voltage and whose output is coupled to a gate of the first P-channel transistor;
• and
• a second comparator whose inverting input is coupled to the source of the first N-channel transistor, whose non-inverting input is coupled to a second reference voltage and whose output is coupled to a gate of the second P-channel transistor.

A semiconductor device comprising:

• a first N-channel transistor that supplies a load current to an external load;
• a second N-channel transistor coupled in parallel to the first N-channel transistor;
• a third N-channel transistor whose drain is coupled to a source of the second N-channel transistor;
• a differential amplifier whose non-inverting input is coupled to a source of the first N-channel transistor, whose inverting input is coupled to the source of the second N-channel transistor and whose output is coupled to a gate of the third N-channel transistor;
• a current generation circuit that is coupled to a source of the third N-channel transistor and outputs a current corresponding to a power consumption generated in the first N-channel transistor;
• a temperature sensor;
• a constant current source coupled to the temperature sensor;
• a voltage follower circuit coupled to a connection point of the temperature sensor and the constant current source;
• a resistor-capacitor-network that is coupled between the current generation circuit and the voltage follower circuit and includes a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance between the first N-channel transistor and the temperature sensor;
• an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network;
• a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage;
• and
• a first switch coupled between the connection point of the current generation circuit and the resistor-capacitor-network and the voltage source,
• wherein the detection target is the first N-channel transistor,
• wherein the current generation circuit comprises:
• a first current mirror circuit coupled to the source of the third N-channel transistor;
• a second current mirror circuit coupled to the first current mirror circuit and having a first and second outputs;
• a first P-channel transistor whose source is coupled to the first output of the second current mirror circuit and whose drain is coupled to one end of the resistor-capacitor-network;
• a second P-channel transistor whose source is coupled to the second output of the second a current mirror circuit and whose drain is coupled to one end of the resistor-capacitor-network;
• a first comparator whose non-inverting input is coupled to the source of the first N-channel transistor, whose inverting input is coupled to a first reference voltage and whose output is coupled to a gate of the first P-channel transistor;
• and
• a second comparator whose non-inverting input is coupled to the source of the first N-channel transistor, whose inverting input is coupled to a second reference voltage and whose output is coupled to a gate of the second P-channel transistor.