Generalized acceleration of matrix multiply accumulate operations

A machine-readable medium comprising instructions that, if performed by one or more processors, cause the one or more processors to:

• calculate a dot product by:
• accumulating a plurality of partial products generated by multiplying each element of a first vector with a corresponding element of a second vector;
• and
• summing the plurality of partial products with an element of a matrix;
• wherein the one or more processors comprise:
• an instruction cache;
• an L1 cache;
• an L2 cache;
• a crossbar (Xbar);
• arithmetic logic units (ALUs);
• a front end unit to read commands written by a host processor;
• a work distribution unit to dispatch tasks to a plurality of processing clusters;
• and
• a register file to store matrices specified in a matrix-fused multiply accumulate (MFMA) instruction, wherein the MFMA instruction is to multiply a first matrix with a second matrix and sum a result with a third matrix, and wherein each element of the matrices is to be encoded as floating point;
• and
• wherein results of the MFMA instruction are to be accumulated in the register file.