Semiconductor device with first-in-first-out circuit
OwnerSeiji Narui, Yuki Ebiharainventors
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Abstract
Apparatuses including a first-in first-out circuit are described. An example apparatus includes: a first-in first-out circuit including a first latch, a second latch and a logic circuit coupled in series. The first latch receives first data and latches the first data responsive to a first input pointer signal. The second latch receives the latched first data from the first latch and latches the received first data responsive to a second input pointer signal that has a different phase from the first input pointer signal and thus provides a second data. The logic circuit receives the second data and an output pointer signal and further provides an output data responsive to the output pointer signal.
Claims9
An apparatus comprising:
- a first plurality of latches coupled in series and configured to receive an input signal, the first plurality of latches including a first latch configured to provide a first signal responsive, at least in part, to the input signal at a first timing;
- a second plurality of latches coupled in series and configured to receive the input signal, the second plurality of latches including a second latch configured to provide a second signal responsive, at least in part, to the input signal at a second timing that is different from the first timing;
- a first NAND circuit configured to receive the first signal and provide the first signal at a third timing;
- and
- a second NAND circuit configured to receive the second signal and provide the second signal at a fourth timing that is different from the third timing.
Dependencies are inferred from the claim text.