Display device

A display device comprising:

• a substrate having an emission area and a non-emission area;
• a first interlayer insulating layer on the substrate;
• a first data conductive layer on the first interlayer insulating layer and comprising a plurality of electrode base layers in the emission area and source/drain electrodes of a driving transistor;
• a via layer on the first data conductive layer and comprising a first planarization layer in the non-emission area and inner banks on the electrode base layers;
• a plurality of electrodes on the electrode base layers;
• and
• a plurality of light emitting elements between the electrodes,
• wherein the electrode base layers comprise a first electrode base layer and a second electrode base layer spaced from the first electrode base layer,
• wherein the electrodes comprise a first electrode on the first electrode base layer and a second electrode on the second electrode base layer,
• wherein the light emitting elements are between the first electrode and the second electrode,
• wherein the inner banks comprise a first inner bank between the first electrode base layer and the first electrode, and
• wherein an outer edge of the first electrode base layer fully surrounds an outer edge of the first inner bank in a plan view.

A display device comprising:

• a substrate having an emission area and a non-emission area;
• a first interlayer insulating layer on the substrate;
• a first data conductive layer on the first interlayer insulating layer and comprising source/drain electrodes of a driving transistor in the non-emission area and a plurality of electrode base layers in the emission area;
• a via layer on the first data conductive layer and comprising a first planarization a plurality of electrodes on the electrode base layers;
• and
• layer in the non-emission area and inner banks on the electrode base layers;
• a plurality of light emitting elements between the electrodes,
• wherein the electrode base layers comprise a first electrode base layer and a second electrode base layer spaced from the first electrode base layer,
• wherein the electrodes comprise a first electrode on the first electrode base layer and a second electrode on the second electrode base layer,
• wherein the light emitting elements are between the first electrode and the second electrode,
• wherein a height of the first planarization layer is greater than heights of the inner banks,
• wherein the via layer further comprises an outer bank at a periphery of the emission area, and
• wherein a height of the outer bank is greater than the heights of the inner banks but is less than the height of the first planarization layer.