Power detector
AssigneeRichWave Technology Corp.
InventorShun-Nan Tai
Life of this patent
Estimating the term…
Abstract
A power detector includes a detection circuit and a bias circuit. The detection circuit is used to receive an input signal and output a power indication signal. The bias circuit includes a first impedance unit, a second impedance unit and a transistor. The transistor includes a first terminal and a control terminal coupled to the first impedance unit, and a second terminal. The second impedance unit is coupled between the first terminal of the transistor and an output terminal of the bias circuit, or between the second terminal of the transistor and a second terminal of the bias circuit. The output terminal of the bias circuit is coupled to an input terminal of the detection circuit, and is used to output a bias signal.
Claims19
A power detector comprising:
- a detection circuit comprising an input terminal configured to receive an input signal, and an output terminal configured to output a power indication signal;
- and
- a bias circuit comprising:
- a first terminal configured to receive a first operating voltage;
- a second terminal configured to receive a second operating voltage;
- an output terminal coupled to the input terminal of the detection circuit, and configured to output a bias signal;
- a first impedance unit comprising a first terminal coupled to the first terminal of the bias circuit, and a second terminal;
- a first transistor comprising a first terminal coupled to the second terminal of the first impedance unit, a second terminal coupled to the second terminal of the bias circuit, and a control terminal coupled to the second terminal of the first impedance unit;
- a second impedance unit comprising a first terminal and a second terminal;
- and
- a fourth impedance unit comprising a first terminal coupled to the second terminal of the first impedance unit and the control terminal of the first transistor, and a second terminal directly coupled to the first terminal of the first transistor and the first terminal of the second impedance unit;
- wherein the first terminal of the second impedance unit is coupled to the first terminal of the first transistor, and the second terminal of the second impedance unit is coupled to the output terminal of the bias circuit;
- or
- the first terminal of the second impedance unit is coupled to the second terminal of the first transistor, the second terminal of the second impedance unit is coupled to the second terminal of the bias circuit, and the first terminal of the first transistor is further coupled to the output terminal of the bias circuit.
Dependencies are inferred from the claim text.