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US 11,784,854 B2Granted
Receiver including a multi-rate equalizer
AssigneesSK hynix Inc., Seoul National University R&Db Foundation
InventorsMoon-Chul Choi, Sanghee Lee, Seungha Roh, Kwangho Lee, Deog-Kyoon Jeong
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Abstract
A receiver includes an equalization circuit configured to output a data sample signal and an edge sample signal by sampling a data input signal according to clock signal, and to perform an equalization operation according to the data sample signal and the edge sample signal; and a clock gate circuit configured to select the clock signals from among a plurality of multi-phase clock signals according to a selection signal.
Claims13
A receiver comprising:
- an equalization circuit configured to output a data sample signal and an edge sample signal by sampling a data input signal according to a multi-phase clock signal, and to perform an equalization operation according to the data sample signal and the edge sample signal;
- and
- a clock gate circuit configured to select the multi-phase clock signal from among a plurality of multi-phase clock signals according to a selection signal
- wherein the equalization circuit comprises:
- a sampling equalizer configured to generate the data sample signal and the edge sample signal according to the multi-phase clock signal;
- and
- an equalization control circuit configured to select a plurality of feedback signals from among the data sample signal and the edge sample signal and to generate a plurality of weight signals respectively corresponding to the plurality of feedback signals,
- wherein the sampling equalizer performs an equalization operation according to the plurality of weight signals and the plurality of feedback signals.
5 more elements
Dependencies are inferred from the claim text.