Chopper-stabilized programmable gain amplifier

A circuit, comprising:

• an amplifier having an input and an output;
• a current-to-voltage amplifier having an input;
• a first plurality of transistors coupled between the output of the amplifier and the input of the current-to-voltage amplifier, and
• a second plurality of transistors coupled between the output of the amplifier and the input of the current-to-voltage amplifier;
• wherein the first plurality of transistors from which at least one, but not all, of the transistors is activated in each clock cycle to pass a first current controlled by the output of the amplifier;
• and
• the second plurality of transistors from which at least two, but not all, of the transistors are activated in each clock cycle to pass a second current that mirrors the first current according to a 1:M current mirror ratio where M is an integer greater than one.

A circuit, comprising:

• a first plurality of metal oxide semiconductor field effect transistors, each transistor of the first plurality having a gate, a drain, and a source;
• a second plurality of metal oxide semiconductor field effect transistors, each transistor of the second plurality having a gate, a drain, and a source;
• the sources of each transistor of the first and second pluralities coupled together;
• the drains of each transistor of the first plurality coupled together at a first node;
• the drains of each transistor of the second plurality coupled together at a second node, the first node not coupled to the second node;
• the gates of each transistor of the first and second pluralities is configured to receive separate control signals;
• and
• a shift logic circuit having a clock input configured to receive a clock signal, the shift logic circuit having at least eight control outputs, each of the eight control outputs coupled to a respective gate of the first or second pluralities of transistors.