Memory device
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
InventorsYa-Jui Tsou, Zong-You Luo, Chee-Wee Liu, Shao-Yu Lin, Liang-Chor Chung, Chih-Lin Wang
Life of this patent
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Abstract
A magnetoresistive memory device includes a memory stack, a spin-orbit-torque (SOT) layer, and a free layer. The memory stack includes a pinned layer, a spacer layer over the pinned layer, a reference layer over the spacer layer, and a tunnel barrier layer over the reference layer. The SOT layer has a top surface substantially coplanar with a top surface of the tunnel barrier layer of the memory stack. The free layer interconnects the SOT layer and the tunnel barrier layer.
Claims20
A magnetoresistive memory device comprising:
- a memory stack comprising:
- a pinned layer;
- a spacer layer over the pinned layer;
- a reference layer over the spacer layer;
- and
- a tunnel barrier layer over the reference layer;
- a spin-orbit-torque (SOT) layer having a top surface substantially coplanar with a top surface of the tunnel barrier layer of the memory stack;
- and
- a free layer interconnecting the SOT layer and the tunnel barrier layer.
A magnetoresistive memory device comprising:
- a dielectric layer;
- a memory stack embedded in the dielectric layer and comprising:
- a pinned layer;
- a reference layer over the pinned layer;
- and
- a spacer layer between the pinned layer and the reference layer;
- a spin-orbit-torque (SOT) layer adjacent to the memory stack and embedded in the dielectric layer;
- and
- a free layer interconnecting the memory stack and the SOT layer, wherein a bottom surface of the free layer is in contact with a top surface of the dielectric layer and a top surface of the memory stack.
A magnetoresistive memory device comprising:
- a memory stack comprising:
- a pinned layer;
- a reference layer over the pinned layer;
- and
- a spacer layer between the pinned layer and the reference layer;
- a spin-orbit-torque (SOT) layer extending in a first direction;
- a free layer extending from the memory stack to the SOT layer in a second direction that crosses the first direction in a top view;
- and
- an MgO capping layer over the free layer and covering the SOT layer.
Dependencies are inferred from the claim text.