US 11,778,834 B2 · Three-dimensional (3D) semiconductor memory device

Abstract

A 3D semiconductor memory device includes a peripheral circuit structure including a first row decoder region, a second row decoder region, and a control circuit region between the first and second row decoder regions, a first electrode structure and a second electrode structure on the peripheral circuit structure, spaced apart in a first direction, and each including stacked electrodes, a mold structure on the peripheral circuit structure between the first and second electrode structures and including stacked sacrificial layers, vertical channel structures penetrating the first and second electrode structures, a separation insulating pattern provided between the first electrode structure and the mold structure and penetrating the mold structure, and a separation structure intersecting the first electrode structure in the first direction and extending to the separation insulating pattern, wherein a maximum width of the separation insulating pattern in a second direction is greater than a maximum width of the separation structure in the second direction.

Claims20

Dependent claims

A three-dimensional (3D) semiconductor memory device comprising:

a peripheral circuit structure including a first row decoder region, a second row decoder region, and a control circuit region between the first row decoder region and the second row decoder region;
a first electrode structure and a second electrode structure on the peripheral circuit structure, wherein the first electrode structure and the second electrode structure are spaced apart in a first direction and each respectively includes stacked electrodes;
a mold structure on the peripheral circuit structure, wherein the mold structure is disposed between the first electrode structure and the second electrode structure and includes stacked sacrificial layers;
and
vertical channel structures penetrating the first electrode structure and the second electrode structure,
wherein, when viewed in plan, the mold structure has a line shape that extends in a first direction,
wherein the mold structure is configured to separate the first electrode structure and the second electrode structure from each other in a second direction.

4 more elements

A three-dimensional (3D) semiconductor memory device comprising:

a substrate;
a peripheral circuit structure on the substrate;
an electrode structure including electrodes stacked on the peripheral circuit structure;
a mold structure intersecting the electrode structure and extending in a first direction, the mold structure dividing the electrode structure into a first electrode structure and a second electrode structure in a second direction and extending in the first direction;
vertical channel structures penetrating the first electrode structure and the second electrode structure;
and
a through-contact penetrating the mold structure to extend to the peripheral circuit structure,
wherein each of the vertical channel structures includes a first vertical extension, a second vertical extension on the first vertical extension, and an expansion portion between the first and second vertical extensions,
wherein a diameter of each of the vertical channel structures changes abruptly at the expansion portion, and
wherein a diameter of the through-contact continuously varies along a vertical direction.

7 more elements

Dependencies are inferred from the claim text.

Three-dimensional (3D) semiconductor memory device

Life of this patent

Three-dimensional (3D) semiconductor memory device

Life of this patent

Abstract

Claims20