Nonvolatile memory device

A nonvolatile memory device comprising:

• a substrate;
• an electrode stack structure disposed on the substrate, the electrode stack structure including gate electrode layers and interlayer insulation layers, which are alternately stacked in a direction perpendicular to the substrate;
• a first trench penetrating the electrode stack structure on the substrate to expose sidewall surfaces of the gate electrode layers and the interlayer insulation layers;
• a charge barrier layer disposed to cover the interlayer insulation layers and the gate electrode layers along an inner surface of the trench;
• a charge trap layer disposed on the charge barrier layer along the inner surface of the trench;
• a tunneling structure disposed on the charge trap layer along the inner surface of the trench;
• and
• a channel layer disposed to contact the tunneling structure,
• wherein the tunneling structure comprises:
• a first tunneling layer including a first insulative material;
• a second tunneling layer including a resistance switching material;
• and
• a third tunneling layer including a second insulative material,
• wherein when a voltage equal to or greater than a predetermined threshold voltage is applied to the second tunneling layer, a resistance state of the second tunneling layer is configured to be converted from a high resistance state to a low resistance state, and
• wherein when the voltage applied to the second tunneling layer is removed from the second tunneling layer, the resistance state of the second tunnel layer is configured to be converted from the low resistance state to the high resistance state.