Memory devices including multiplexer devices, and related electronic systems

A memory device, comprising:

• a stack structure vertically overlying a base structure and comprising conductive material vertically alternating with insulative material;
• memory arrays horizontally offset from one another in a first direction and individually comprising strings of memory cells vertically extending through the stack structure;
• conductive lines vertically overlying the stack structure, the conductive lines horizontally overlapping and in electrical communication with columns of the strings of memory cells of one of the memory arrays;
• additional conductive lines vertically overlying the stack structure and horizontally offset from the conductive lines in the first direction, the additional conductive lines horizontally overlapping and in electrical communication with columns of the strings of memory cells of an additional one of the memory arrays;
• page buffer devices within the base structure and horizontally positioned between the one of the memory arrays and the additional one of the memory arrays in the first direction;
• and
• multiplexer devices horizontally positioned between the one of the memory arrays and the additional one of the memory arrays in the first direction, each of the multiplexer devices in electrical communication with one of the conductive lines, one of the additional conductive lines, and one of the page buffer devices.

An electronic system, comprising:

• an input device;
• an output device;
• a processor device operably connected to the input device and the output device;
• and
• a memory device operably connected to the processor device and comprising:
• a stack structure comprising tiers each comprising conductive material and insulative material vertically adjacent the conductive material;
• memory array regions horizontally neighboring one another in a first direction, each of the memory array regions comprising strings of memory cells vertically extending through the stack structure;
• a digit line exit region horizontally intervening between the memory array regions in the first direction;
• digit lines overlying the stack structure and coupled to the strings of memory cells of one of the memory array regions, the digit lines horizontally extending in the first direction through the one of the memory array regions and terminating within the digit line exit region;
• additional digit lines overlying the stack structure and coupled to the strings of memory cells of an additional one of the memory array regions, the additional digit lines horizontally extending in the first direction through the additional one of the memory array regions and terminating within the digit line exit region;
• multiplexer devices within a horizontal area of the digit line exit region, each of the multiplexer devices coupled to one of the digit lines and one of the additional digit lines;
• and
• a base structure underlying the stack structure and comprising page buffer circuitry coupled to the multiplexer devices.