Receiver with improved noise immunity
AssigneeRambus Inc.
InventorPanduka Wijetunga
Life of this patent
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Abstract
A binary receiver combines a fast amplifier with a relatively slow amplifier for noise rejection. Both the fast and slow amplifiers employ hysteresis. The fast amplifier has relatively lower hysteresis, meaning that its sensitivity is a less effected by prior data values but more susceptible to glitch-induced errors. Conversely, the slow amplifier has relatively higher hysteresis and rejects glitches but introduces undesirable signal-propagation delays. A state machine taking input from both amplifiers allows the receiver to filter glitches without incurring a significant data-propagation delay.
Claims20
A receiver to produce a binary output signal from an input signal, the receiver comprising:
- a state machine to represent the binary output signal as a first binary value in a first state and a second state, and to represent the binary output signal as a second binary value in a third state and a fourth state;
- a first amplifier to apply a first hysteresis feedback transfer function of the binary output signal to the input signal;
- and
- a second amplifier to apply a second hysteresis feedback transfer function of the binary output signal to the input signal, the second hysteresis feedback transfer function a stronger function of the binary output signal than the first hysteresis feedback transfer function;
- the state machine to transition from the first state to the second state, and from the third state to the fourth state, responsive to the second amplifier.
A receiver for recovering a digital output signal from a series of input symbols, the digital output signal exhibiting a first digital value and a second digital value, the receiver comprising:
- a first amplifier to apply to the input symbols a first hysteresis feedback transfer function of the output signal;
- a second amplifier to apply to the input symbols a second hysteresis feedback transfer function of the output signal, the second hysteresis feedback transfer function a stronger function of the output signal than the first hysteresis feedback transfer function;
- a state machine to transition between states responsive to the first amplifier and the second amplifier, the state machine having:
- a first state to output the first digital value;
- a second state to output the first digital value;
- a third state to output the second digital value;
- and
- a fourth state to output the second digital value;
- the state machine to transition:
- from the first state to the second state and from the third state to the fourth state responsive to the second amplifier;
- and
- from the second state to the third state and from the fourth state to the first state responsive to the first amplifier.
A method of recovering a digital output signal from a series of input symbols, the method comprising:
- applying a low hysteresis feedback transfer function of the output signal to the input symbols to make fast decisions;
- applying a high hysteresis feedback transfer function of the output signal to the input symbols to make slow decisions, the high hysteresis feedback transfer function greater than the low hysteresis feedback transfer function;
- in a first slow state,
- outputting a first value of the digital output signal;
- ignoring the fast decisions;
- and
- transitioning to a first fast state responsive to one of the slow decisions.
Dependencies are inferred from the claim text.