Gain error reduction in switched-capacitor delta-sigma data converters sharing a voltage reference with a disabled data converter

A method of reducing gain error in multiple switched-capacitor delta-sigma data converters due to leakage-based voltage droop across corresponding reference switched-capacitor networks that are maintained at a reference voltage by periodic connection to a reference voltage buffer in coarse phases and maintain a reference filter capacitor at the reference voltage by periodic connection to a filter capacitor in fine phases, the method comprising:

• determining an error between a voltage across the reference filter capacitor and the reference voltage caused by leakage in the reference feedback switched-capacitor networks of one or more of the multiple delta-sigma data converters that have an inactive state selected;
• determining a correction in conformity with the determined error;
• and
• correcting the gain error of at least one of the multiple delta-sigma data converters by applying the correction.

An integrated circuit comprising:

• a plurality of switched-capacitor delta-sigma data converters, the individual delta-sigma data converters including an integrator having an input for receiving an input voltage, a quantizer for generating a digital value quantizing an output of the integrator and on average representing the input voltage, and a reference feedback switched-capacitor network alternatively coupled between a voltage reference filter capacitor and the integrator for providing feedback charge quanta representing an output of the quantizer;
• a power management circuit for controlling a power management state of the plurality of switched-capacitor delta-sigma data converters so that the individual switched-capacitor delta-sigma data converters are selectable between an active and an inactive state;
• a voltage reference circuit providing the voltage reference output, wherein the voltage reference filter capacitor is maintained at a reference voltage by periodic connection to a voltage reference buffer in coarse phases and to the reference feedback switched-capacitor networks of ones of the plurality of switched-capacitor delta-sigma data converters having the active state selected in coarse phases;
• and
• a voltage droop compensation circuit responsive to the power management circuit for providing a correction current to one or more of the reference feedback switched-capacitor networks corresponding to one or more of the plurality of delta-sigma data converters having the inactive state selected by the power management circuit, whereby gain error in the ones of the plurality of switched-capacitor delta-sigma data converters having the active state selected due to leakage in the reference feedback switched-capacitor networks of the one or more delta-sigma data converters having the inactive state selected causing voltage droop across the voltage reference filter capacitor is corrected.

An integrated circuit comprising:

• a plurality of switched-capacitor delta-sigma data converters, the individual delta-sigma data converters including an integrator having an input for receiving an input voltage, a quantizer for generating a digital value quantizing an output of the integrator and on average representing the input voltage, and a reference feedback switched-capacitor network alternatively coupled between a voltage reference filter capacitor and the integrator for providing feedback charge quanta representing an output of the quantizer;
• a voltage reference circuit providing the voltage reference output, wherein the voltage reference filter capacitor is maintained at a reference voltage by periodic connection to a voltage reference buffer in coarse phases and to the reference feedback switched-capacitor networks of ones of the plurality of switched-capacitor delta-sigma data converters having the active state selected in coarse phases;
• and
• a voltage droop compensation circuit for correcting the gain of at least one of the plurality of switched-capacitor delta-sigma data converters to correct for gain error due to leakage in the reference feedback switched-capacitor networks of one or more of the plurality of switched-capacitor delta-sigma data converters that have an inactive state selected causing voltage droop across the voltage reference filter capacitor, wherein the voltage droop compensation circuit determines an error between a voltage across the reference filter capacitor and the reference voltage, determines a correction in conformity with the determined error, and correct the gain error of the least one of the plurality of switched-capacitor delta-sigma data converters by applying the correction.