Linearization of digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) and associated methods

A system for linearizing analog-to-digital conversion, comprising:

• a comparator positioned to receive an analog signal as a first input;
• a successive approximation register positioned to receive as an input an output of the comparator and configured to generate an output comprising B bits;
• and
• a digital-to-analog converter (DAC) configured to:
• receive, at a digital-to-analog converter (DAC) an input digital word;
• decompose the input digital word into a plurality of segments;
• generate a redundant representation of each of the plurality of segments;
• generate a redundant mapping of the redundant representation of each of the plurality of segments, defining a plurality of redundantly mapped segments;
• assigning a first probability for selecting the plurality of segments;
• assigning a second probability for selecting the plurality of redundantly mapped segments;
• selecting, with the first probability, the plurality of segments and with the second probability, the plurality of redundantly mapped segments;
• converting the selected segments into analog signals by a plurality of sub-DACs;
• and
• combining the analog signals to define an output analog signal, wherein each of the plurality of segments is converted into an analog signal with a sub-DAC, wherein a resolution of each sub-DAC associated with intermediate segment pairs is at least one bit greater than the resolution of a sub-DAC for a first segment pair.