Phase-locked loop (PLL) with direct feedforward circuit
AssigneeTexas Instruments Incorporated
InventorsDebapriya Sahu, Rittu Sachdev
Life of this patent
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Abstract
A phase-locked loop (PLL) device includes: 1) a detector configured to output an error signal to indicate a phase offset between a feedback clock signal and a reference clock signal; 2) a charge pump coupled to the detector and configured to output a charge pump signal based on the error signal; 3) an integrator with a feedback path, an input node, a reference node, and an output node, wherein the input node is coupled to the charge pump and receives the charge pump signal; 4) a voltage-controlled oscillator (VCO) coupled to the output node of the integrator via a resistor; and 5) a feedforward circuit coupled directly to the detector and configured to apply an averaged version of the error signal to correct a voltage level received by the VCO.
Claims20
A device comprising:
- a phase offset detector having a first input, a second input, and an output, wherein the first input is configured to receive a first clock signal and the second input is configured to receive a second clock signal;
- a charge pump having an input and an output, wherein the input of the charge pump is coupled to the output of the phase offset detector;
- a feedforward circuit having an input and an output, wherein the input of the feedforward circuit is coupled to the output of the phase offset detector;
- an integrator having a first input, a second input and an output, wherein the first input of the integrator is coupled to the output of the charge pump and the second input of the integrator is coupled to a reference voltage terminal;
- and
- a controllable oscillator having an input coupled to the output of the integrator.
An apparatus comprising:
- a first clock signal generator;
- a second clock signal generator;
- and
- a phase-locked loop (PLL) including:
- a phase offset detector having a first input, a second input, and an output, wherein the first input is coupled to the first clock signal generator and the second input is coupled to the second clock signal generator;
- a charge pump having an input and an output, wherein the input of the charge pump is coupled to the output of the phase offset detector;
- a feedforward circuit having an input and an output, wherein the input of the feedforward circuit is coupled to the output of the phase offset detector;
- an integrator having a first input, a second input and an output, wherein the first input of the integrator is coupled to the output of the charge pump and the second input of the integrator is coupled to a reference terminal;
- and
- a controllable oscillator having an input coupled to the output of the integrator.
Dependencies are inferred from the claim text.