Bias circuit for radio frequency power amplifier

A bias circuit for a radio frequency power amplifier, comprising a resistor voltage divider network, a power amplifier and a bias voltage adjusting loop,

• wherein the resistor voltage divider network is coupled with the power amplifier;
• the bias voltage adjusting loop receives a signal input, and an output terminal thereof is coupled to the resistor voltage divider network;
• the bias voltage adjusting loop comprises one voltage divider resistor and one transistor pair, wherein the transistor pair comprises a first MOS transistor and a second MOS transistor;
• one terminal of the voltage divider resistor is connected with a reference voltage, and an other terminal is coupled with a gate of the first MOS transistor;
• the gate of the first MOS transistor receives the signal input, a drain is short-circuited to the gate, and a source is grounded;
• a gate of the second MOS transistor is coupled to the gate of the first MOS transistor, a drain is coupled to the resistor voltage divider network, and a source is grounded;
• because of short-circuit of the drain of the first MOS transistor to the gate, namely, connection in a form of diode, with an increase of a signal input power, a direct current flowing into the first MOS transistor is increased, and a voltage drop at two terminals of the voltage divider resistor is increased, and gate and source voltages of the second MOS transistor are caused to decrease, and a direct current flowing through the second MOS transistor is further caused to decrease;
• a decrease of the current of the second MOS transistor causes voltage drops at two terminals of resistors of the resistor voltage divider network to decrease, and gate voltages of the power amplifier are caused to increase, so that the gate voltages of the power amplifier are adaptively and dynamically adjusted according to a power change of an input signal.