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US 11,777,406 B2Granted
Multiphase switched mode power supply clocking circuits and related methods
AssigneeTexas Instruments Incorporated
InventorsTawen Mei, Karen Huimun Chan
Life of this patent
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Abstract
Multiphase switched mode power supply clock apparatus, systems, articles of manufacture, and related methods are disclosed. An example apparatus includes a first clock recovery circuit to in response to obtaining a first clock pulse, transmit the first clock pulse to a power converter to cause the power converter to switch based on the first clock pulse, in response to obtaining a second clock pulse after the first clock pulse re-transmit the second clock pulse to a second clock recovery circuit, and increment a count value, and in response to the count value meeting a phase selection value, reset the count value.
Claims18
A circuit comprising:
- a counter circuit having a clock input, a clear input, and a counter output, wherein the counter circuit includes:
- a first half adder having a first half adder input, a second half adder input, a first half adder output, and a second half adder output;
- a second half adder having a third half adder input, a fourth half adder input, a third half adder output, and a fourth half adder output, the third half adder input coupled to the first half adder input, the fourth half adder input coupled to the second half adder output, and the third half adder output coupled to the first half adder output;
- a third half adder having a fifth half adder input, a sixth half adder input, a fifth half adder output, and a sixth half adder output, the fifth half adder input coupled to the first half adder input, the sixth half adder input coupled to the fourth half adder output, and the fifth half adder output coupled to the first half adder output;
- a fourth half adder having a seventh half adder input, an eighth half adder input, a seventh half adder output, and an eighth half adder output, the seventh half adder input coupled to the first half adder input, the eighth half adder input coupled to the sixth half adder output, and the seventh half adder output coupled to the first half adder output;
- a multiplexer having a first multiplexer input, a second multiplexer input, and a multiplexer output, the first multiplexer input coupled to the clear input and the second multiplexer input coupled to the first half adder output;
- and
- a flip-flop having a first flip-flop input, a second flip-flop input, and a flip-flop output, the first flip-flop input coupled to the clock input, the second flip-flop input coupled to the multiplexer output, and the flip-flop output is coupled to the counter output;
- a comparator having a first comparator input, a second comparator input, and a comparator output, wherein the first comparator input is coupled to the counter output;
- and
- a logic gate having a logic gate input and a logic gate output, wherein the logic gate input is coupled to the counter output.
8 more elements
A circuit comprising:
- a counter configured to produce a count signal responsive to a clock signal and a clear signal;
- a comparator configured to produce the clear signal by comparing the count signal to a phase selection signal;
- a first logic gate having a first logic output, wherein the first logic gate is configured to provide a logic output signal at the first logic output responsive to the count signal;
- and
- a second logic gate configured to provide a clock pulse responsive to the logic output signal and the clock signal.
2 more elements
A system comprising:
- an integrated device comprising:
- a clock recovery circuit comprising:
- a counter circuit having a clock input, a clear input, and a counter output;
- a comparator having a first comparator input, a second comparator input, and a comparator output, wherein the first comparator input is coupled to the counter output;
- and
- a logic gate having a logic gate input and a logic gate output, wherein the logic gate input is coupled to the counter output;
- a direct current (DC)/DC converter coupled to the clock recovery circuit;
- and
- an inductor coupled to the DC/DC converter.
6 more elements
Dependencies are inferred from the claim text.