Semiconductor device, method for manufacturing the same, and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Estimating the term…
A semiconductor device with reduced parasitic capacitance is provided. A stack is formed on an insulating layer, the stack comprising a first oxide insulating layer, an oxide semiconductor layer over the first oxide insulating layer, and a second oxide insulating layer on the oxide semiconductor layer; a gate electrode layer and a gate insulating layer are formed on the second oxide insulating layer; a first low-resistance region is formed by adding a first ion to the second oxide semiconductor layer using the gate electrode layer as a mask; a sidewall insulating layer is formed on an outer side of the gate electrode layer; a second conductive layer is formed over the gate electrode layer, the sidewall insulating layer, and the second insulating layer; and an alloyed region in the second oxide semiconductor layer is formed by performing heat treatment.
An imaging device comprising:
An electronic appliance comprising:
Dependencies are inferred from the claim text.