Hybrid complementary field effect transistor device
AssigneeInternational Business Machines Corporation
InventorsRuilong Xie, Chen Zhang, Jingyun Zhang, Junli Wang, Pietro Montanini
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Abstract
A stacked transistor device is provided. The stacked transistor device includes a nanosheet transistor device on a substrate; and a fin field effect transistor device over the nanosheet transistor device to form the stacked transistor device, wherein the fin field effect transistor device is configured to have a current flow through the fin field effect transistor device perpendicular to a current flow through the nanosheet transistor device.
Claims20
A stacked transistor device, comprising:
- a nanosheet transistor device on a substrate;
- and
- a fin field effect transistor device over the nanosheet transistor device to form the stacked transistor device, wherein the fin field effect transistor device is configured to have a current flow through the fin field effect transistor device perpendicular to a current flow through the nanosheet transistor device.
A stacked transistor device, comprising:
- a plurality of stacked semiconductor channel segments on a substrate;
- a nanosheet source/drain region on each of opposite sides of the plurality of stacked semiconductor channel segments;
- a fin section over the plurality of stacked semiconductor channel segments;
- a fin source/drain on each of opposite sides of the fin section;
- a shared gate structure on the fin section and the plurality of stacked semiconductor channel segments, wherein the two nanosheet source/drain regions are on opposite sides of the shared gate structure, and the two fin source/drains are on opposite sides of the shared gate structure, such that the two nanosheet source/drain regions are on different sides of the shared gate structure than the two fin source/drains.
A method of forming a stacked transistor device, comprising:
- forming a plurality of stacked semiconductor channel segments and a fin section over the plurality of stacked semiconductor channel segments on a substrate;
- forming a nanosheet source/drain region on each of opposite sides of the plurality of stacked semiconductor channel segments;
- forming a fin source/drain on each of opposite sides of the fin section;
- forming a shared gate structure on the fin section and the plurality of stacked semiconductor channel segments, wherein the two nanosheet source/drain regions are on opposite sides of the shared gate structure, and the two fin source/drains are on opposite sides of the shared gate structure, such that the two nanosheet source/drain regions are on different sides of the shared gate structure than the two fin source/drains.
Dependencies are inferred from the claim text.