Semiconductor device and semiconductor module

A semiconductor device, comprising:

• a semiconductor substrate;
• an active portion provided on the semiconductor substrate;
• a transistor portion arranged in the active portion;
• an emitter electrode arranged above the active portion;
• a dummy element portion;
• a well region separating the transistor portion and the dummy element portion;
• and
• a dividing well region for dividing the active portion in a top view;
• wherein
• the transistor portion and the dummy element portion both include gate trench portions provided on an upper surface of the semiconductor substrate;
• the transistor portion has a first conductivity type emitter region provided in contact with the gate trench portion on the upper surface of the semiconductor substrate;
• a second conductivity type region is provided in a region in contact with the gate trench portion on an upper surface of the dummy element portion;
• the dividing well region has a longitudinal length in a predetermined well longitudinal direction;
• the dividing well region has a wide portion with a width wider than other portions in a direction perpendicular to the well longitudinal direction in a top view;
• and
• the emitter electrode is arranged above the wide portion.

A semiconductor device, comprising:

• a semiconductor substrate;
• an active portion provided on the semiconductor substrate;
• an emitter electrode arranged above the active portion;
• and
• a dividing well region for dividing the active portion in a top view, wherein
• the dividing well region has a longitudinal length in a predetermined well longitudinal direction;
• the dividing well region has a wide portion with a width wider than other portions in the direction perpendicular to the well longitudinal direction in a top view;
• and
• the emitter electrode is arranged above the wide portion.

A semiconductor device comprising:

• a semiconductor substrate;
• an emitter electrode arranged above the semiconductor substrate;
• a protective layer provided above the emitter electrode;
• a connecting portion connected with a region of the emitter electrode, which is not covered by the protective layer,
• wherein
• the protective layer divides upper surface of the emitter electrode into a plurality of regions;
• among the plurality of regions of the emitter electrode, an area of a connecting region to which the connecting portion connects is a largest area;
• the protective layer includes at least one of first beam portions having a longitudinal direction in a first direction, and at least one of second beam portions having a longitudinal direction in a second direction that is different from the first direction different from the first direction;
• and
• each of the beam portions is sandwiched between the emitter electrode that is not covered by the protective layer in a lateral direction orthogonal to the respective longitudinal direction in a top view.

A semiconductor device, comprising:

• a semiconductor substrate;
• an active portion provided on the semiconductor substrate;
• an emitter electrode arranged above the active portion;
• a protective layer provided above the emitter electrode;
• a diode portion including a first conductivity type cathode region in contact with a lower surface of the semiconductor substrate;
• a transistor portion including a second conductivity type collector region in contact with the lower surface of the semiconductor substrate, wherein the protective layer is provided at a position that does not to overlap the cathode region;
• and
• a dividing well region for dividing the active portion in a top view;
• wherein
• the dividing well region has a longitudinal length in a predetermined well longitudinal direction;
• the dividing well region has a wide portion with a width wider than other portions in a direction perpendicular to the well longitudinal direction in a top view;
• and
• the emitter electrode is arranged above the wide portion.

A semiconductor device, comprising:

• a semiconductor substrate;
• an active portion provided on the semiconductor substrate;
• a first well region and a second well region provided in the semiconductor substrate and arranged sandwiching the active portion in a top view;
• an emitter electrode arranged above the active portion;
• a protective layer provided above the emitter electrode;
• and
• a pad arranged above the first well region, and separated from the emitter electrode;
• wherein
• the emitter electrode is arranged above the second well region;
• and
• the protective layer divides an upper surface of the semiconductor substrate into a first region where the first well region is provided, a second region where the second well region is provided, and a third region between the first well region and the second well region.