Gate-all-around device

A device comprising:

• a plurality of nanosheets extending in a first direction above a semiconductor substrate and arranged in a second direction substantially perpendicular to the first direction, wherein the plurality of nanosheets comprise a first nanosheet and a second nanosheet above the first nanosheet, and the second nanosheet has a strain greater than the first nanosheet;
• source/drain stressors on either side of the nanosheets, each of the source/drain stressors comprising a first epitaxial layer in contact with the first nanosheet and a second epitaxial layer in contact with the second nanosheet, wherein the first and second epitaxial layers are made of an alloy semiconductor of a first Group IV element and a second Group IV element having a lattice constant greater than a lattice constant of the first Group IV element, and an atomic ratio of the second Group IV element to the first Group IV element in the second epitaxial layer is greater than an atomic ratio of the second Group IV element to the first Group IV element in the first epitaxial layer;
• and
• a gate structure wrapping around each of the plurality of nanosheets.

A device comprising:

• a plurality of first semiconductor layers over a substrate;
• a plurality of second semiconductor layers alternately arranged with the plurality of first semiconductor layers;
• and
• a gate structure extending through each of the plurality of first semiconductor layers, and surrounding channel regions of the plurality of second semiconductor layers, wherein the plurality of second semiconductor layers have source/drain regions extending from a respective one of the channel regions of the plurality of second semiconductor layers to past opposing sides of the gate structure, and the channel regions of the plurality of second semiconductor layers have a greater strain than the source/drain regions of the plurality of second semiconductor layers.