Trench capacitor having improved capacitance and fabrication method thereof

A semiconductor memory device, comprising:

• a bulk semiconductor substrate;
• a film stack on the bulk semiconductor substrate;
• a silicon device layer on the film stack;
• at least one trench with corrugated sidewall surface extending into the silicon device layer, the film stack, and the bulk semiconductor substrate;
• at least one trench capacitor located in the at least one trench, the at least one trench capacitor comprising an inner electrode and an outer electrode with a node dielectric layer therebetween, wherein the node dielectric layer is in direct with the film stack and the bulk semiconductor substrate;
• at least one transistor on the substrate, wherein the at least one transistor comprises a source region and a drain region, a channel region between the source region and the drain region, and a gate over the channel region;
• a conductive layer buried in the at least one trench to electrically connect the source region with the inner electrode, wherein the conductive layer is in direct contact with a sidewall of the source region;
• a trench isolation layer disposed around the conductive layer;
• and
• a silicide layer continuously capping the source region and the conductive layer and extending to the trench isolation layer, wherein the silicide layer covers an entire top surface of the conductive layer and is in direct contact with the conductive layer and the trench isolation layer.