Semiconductor device having buried logic conductor type of complementary field effect transistor, method of forming same

A semiconductor device comprising a buried communication (com) conductor (BC) CFET including:

• first and second active regions arranged in a stack according to CFET-type configuration;
• a first layer of metallization (M_1st layer) over the stack which includes:
• first conductors configured for data or control signals (communication (com) conductors);
• and
• power grid (PG) conductors;
• and
• a layer of metallization (M_B layer) below the stack and which includes second corn conductors.

A method of manufacturing a semiconductor device which includes a buried logic conductor (BLC) CFET region, the method comprising:

• forming first and second active regions arranged in a first stack with the second active region over the first active region;
• forming source/drain (S/D) regions including doping first areas of the active regions, the S/D regions representing first transistor-components, wherein second areas of the active regions which are between corresponding S/D regions are channel regions representing second transistor-components;
• forming a gate structure proximal to the first and second active regions;
• forming metal-to-S/D (MD) contact structures over corresponding ones of the S/D regions, the MD contact structures representing fourth transistor-components;
• and
• forming alpha logic conductors and power grid (PG) conductors which are in a first layer of metallization, which are correspondingly over the gate structure, and which are non-overlapping of each other;
• forming beta logic conductors which are in a buried layer of metallization, which are correspondingly under the gate structure, and which are non-overlapping of each other, and represent corresponding beta logic conductors in a buried layer of metallization.