Back to results
US 11,776,935 B2Granted
Semiconductor device and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
Life of this patent
Estimating the term…
Abstract
An integrated fan out package on package architecture is utilized along with a reference via in order to provide a reference voltage that extends through the InFO-POP architecture. If desired, the reference via may be exposed and then connected to a shield coating that can be used to shield the InFO-POP architecture. The reference via may be exposed by exposing either a top surface or a sidewall of the reference via using one or more singulation processes.
Claims20
A semiconductor device comprising:
- a semiconductor die, a first set of through vias, and a reference via within an encapsulant, wherein the reference via comprises a circular portion and a first extension;
- connections between the first set of through vias and the semiconductor die on a first side of the semiconductor die;
- and
- a lid in physical contact with an entire sidewall of the reference via, the lid being located at least partially on an opposite side of the semiconductor die from the first side.
1 more element
A semiconductor device comprising:
- a first die, a through via, and an encapsulant which are planar with each other;
- a reference via at least partially within the encapsulant, the reference via having a height less than the through via;
- and
- a lid in physical contact with a sidewall and a top surface of the reference via, wherein the lid covers a first package electrically connected with the through via.
1 more element
A semiconductor device comprising:
- a semiconductor die, a first set of through vias, and a reference via embedded within an encapsulant, wherein the semiconductor die is connected to the first set of through vias by first conductive connections on a first side of the semiconductor die, wherein a sidewall and a top surface of the reference via are exposed by the encapsulant;
- second conductive connections on a second side of the semiconductor die opposite the first side, the second conductive connections connecting the first set of through vias to a second semiconductor die;
- and
- a lid in physical contact with both the top surface of the reference via and the sidewall of the reference via.
1 more element
Dependencies are inferred from the claim text.