Method of manufacturing semiconductor structure having polygonal bonding pad

A method of manufacturing a semiconductor structure, comprising:

• providing a substrate and a redistribution layer (RDL) disposed over the substrate, wherein the RDL includes a dielectric layer over the substrate and a conductive plug extending within the dielectric layer;
• disposing an etch stop layer over the RDL;
• disposing a first patterned photoresist over the etch stop layer;
• removing a portion of the dielectric layer and a portion of the etch stop layer that is exposed through the first patterned photoresist;
• removing the first patterned photoresist;
• disposing a first seed layer over the etch stop layer and a portion of the dielectric layer that is exposed through the etch stop layer;
• disposing a second patterned photoresist over the first seed layer;
• disposing a conductive material over a portion of the first seed layer that is exposed through the second patterned photoresist;
• removing the second patterned photoresist;
• removing the etch stop layer;
• and
• removing a portion of the conductive material that protrudes from the dielectric layer to form a bonding pad adjacent to the conductive plug and surrounded by the dielectric layer.