FPGA device forming network-on-chip by using silicon connection layer
AssigneeWuxi Esiontech Co., Ltd.
InventorsJicong Fan, Yanfeng Xu, Yueer Shan, Hua Yan, Yanfei Zhang
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AssigneeWuxi Esiontech Co., Ltd.
InventorsJicong Fan, Yanfeng Xu, Yueer Shan, Hua Yan, Yanfei Zhang
Estimating the term…
The present disclosure discloses an FPGA device forming a network-on-chip by using a silicon connection layer. An active silicon connection layer is designed inside the FPGA device. A silicon connection layer interconnection framework is arranged inside the silicon connection layer. Bare die functional modules inside an FPGA bare die are connected to the silicon connection layer interconnection framework to jointly form the network-on-chip. Each bare die functional module and a network interface and a router that are in the silicon connection layer interconnection framework form an NOC node. The NOC nodes intercommunicate with each other, so that the bare die functional modules in the FPGA bare die without a built-in NOC network can achieve efficient intercommunication by means of the silicon connection layer interconnection framework, reducing the processing difficulty on the basis of improving the data transmission bandwidth and performance inside the FPGA device.
An FPGA device forming a network-on-chip by using a silicon connection layer, wherein the FPGA device comprises a substrate, a silicon connection layer laminated on the substrate, and an FPGA bare die laminated on the silicon connection layer;
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