A three-dimensional stacked package structure containing a micro-channel heat dissipation structure, comprising a chip package portion and a silicon substrate package portion, wherein the chip package portion is composed of a multi-layered chip containing through silicon vias in a three-dimensional stacked packaging manner;
- the silicon substrate package portion is composed of a silicon substrate, the silicon substrate is provided with micro bumps interconnected with external leads respectively, and the chip package portion is assembled on the silicon substrate in a micro bump bonding manner;
- the multi-layered chip is etched to form micro-channels and through holes corresponding to each other, wherein the micro-channels are configured to provide cooling liquid flow in a horizontal direction, and the through holes are configured to provide the cooling liquid flow in an upper layer and a lower layer;
- and sealing rings are arranged around the micro-channels and the through holes;
- the silicon substrate being formed with micro-channels;
- the multi-layered chip comprises a bottom chip, a middle-layer chip and a top chip, and each of which is provided with the through silicon vias, the micro bumps, the micro-channels and the sealing rings with corresponding interlayer positions;
- an upper surface of the bottom chip is etched to form the micro-channels, and the sealing rings are arranged around the micro-channels;
- the middle-layer chip is etched to form the through holes, micro-channels connected with each other via the through holes respectively are etched on the upper surface and a lower surface of the middle-layer chip, and positions of micro-channels on an upper surface and a lower surface of a same side of the middle-layer chip are staggered, a structure that the micro-channels etched on the lower surface of the middle-layer chip are connected with the respective through holes corresponds to positions of the micro-channels on the bottom chip, and the sealing rings are arranged around the micro-channels and the through holes;
- the top chip is etched to form a cooling liquid inlet and an outlet, the cooling liquid inlet and outlet are connected with respective through holes at one side of the middle-layer chip, a lower surface of the top chip is etched to form micro-channels corresponding to a position of a structure that the micro-channels etched on the upper surface of the middle-layer chip is connected with the respective through holes, and the sealing rings are arranged around the cooling liquid inlet and outlet and the micro-channels;
- the micro-channels of the bottom chip, providing a structure wherein the micro-channels of the middle-layer chip and the through holes being connected respectively, and the micro-channels and the cooling liquid inlet and outlet of the top chip are sealed by the respective sealing rings to form a continuous micro-channel heat dissipation structure for cooling liquid to flow among the bottom chip, the middle-layer chip and the top chip in a vertical direction and on the bottom chip, the middle-layer chip and the top chip in the horizontal direction;
- both the micro bumps and the sealing rings are formed by electroplating after photolithography, and the micro bumps and the sealing rings have exactly a same material and thickness and are located on a same process level;
- a metal used by the sealing rings for sputtering a seed layer is titanium or copper, wherein an adhesion layer of the titanium has a thickness of 300 Å to 500 Å, and the copper seed layer has a thickness of 3000 Å to 5000 Å.