Semiconductor structure with hybrid nanostructures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPei-Hsun Wang, Chun-Hsiung Lin, Chih-Hao Wang, Chih-Chao Chou
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Abstract
Semiconductor structures and methods for forming the same are provided. The semiconductor device includes a fin protruding from a substrate and an isolation structure surrounding the fin. The semiconductor device also includes a first channel layer and a second channel layer formed over the fin and at least partially overlapping the isolation structure. The semiconductor device further includes a gate structure formed in a space between the first channel layer and the second channel layer and wrapping around the first channel layer and the second channel layer.
Claims20
A semiconductor structure, comprising:
- a fin protruding from a substrate;
- an isolation structure surrounding the fin;
- a first channel layer and a second channel layer formed over the fin and at least partially overlapping the isolation structure;
- and
- a gate structure formed in a space between the first channel layer and the second channel layer and wrapping around the first channel layer and the second channel layer.
A semiconductor structure, comprising:
- a fin protruding from a substrate;
- an isolation structure surrounding the fin;
- a first channel layer and a second channel layer spaced apart from each other over the fin and the isolation structure;
- and
- a gate structure wrapping around the first channel layer and the second channel layer.
A semiconductor structure, comprising:
- a fin protruding from a substrate;
- an isolation structure surrounding the fin;
- a first channel layer and a second channel layer formed over the fin, wherein the first channel layer has a first sidewall surface, a second sidewall surface opposite to the first sidewall surface, and a third sidewall surface and a fourth sidewall surface connecting the first sidewall surface and the second sidewall surface, and the second channel layer has a fifth sidewall surface, a sixth sidewall surface opposite to the fifth sidewall surface, and a seventh sidewall surface and an eighth sidewall surface connecting the fifth sidewall surface and the sixth sidewall surface;
- a gate structure formed in a space between the first sidewall surface of the first channel layer and the fifth sidewall surface of the second channel layer and in direct contact with the first sidewall surface, the second sidewall surface, the third sidewall surface, and the fourth sidewall surface of the first channel layer and the fifth sidewall surface, the sixth sidewall surface, the seventh sidewall surface, and the eighth sidewall surface of the second channel layer.
Dependencies are inferred from the claim text.