Method for preparing semiconductor device structure with fine patterns at different levels
AssigneeNanya Technology Corporation
InventorCheng-Hsiang Fan
Life of this patent
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Abstract
The present disclosure provides a method for preparing a semiconductor device structure with fine patterns at different levels. The method includes forming a hard mask material over a substrate; etching the hardmask material to form hard mask pillars; forming spacers over sidewall surfaces of the hard mask pillars; etching the hard mask pillars and the target material by using the spacers as a mask to integrally forming a plurality of target structures, a high-level recesses in one of the plurality of target structures and a low-level recess between two target structures; and integrally forming a high-level conductive pattern in the high-level conductive pattern and a low-level conductive pattern in the low-level recess.
Claims11
A method for preparing a semiconductor device structure, comprising the steps of:
- forming a first target structure and a second target structure over a substrate, wherein the first target structure has a first portion, a second portion, and a third portion connected to the first portion and the second portion, wherein a height of the first portion and a height of the second portion are greater than a height of the third portion;
- forming a low-level conductive pattern between the first target structure and the second target structure;
- forming a high-level conductive pattern on the first target structure;
- forming a first tall air gap between the first target structure and the low-level conductive pattern at a position that the first tall air gap is positioned on a sidewall of the second portion of the first target structure;
- forming a second tall air gap between the second target structure and the low-level conductive pattern, wherein the first tall air gap and the second tall air gap have a thickness substantially identical to a thickness of the low-level conductive pattern;
- and
- forming a third tall air gap at a position that the third tall air gap is positioned on a sidewall of the first portion of the first target structure.
Dependencies are inferred from the claim text.