Page buffer, memory device including the page buffer and operating method thereof
AssigneeSK hynix Inc.
InventorsIn Gon Yang, Tae Ho Kim, Jae Hyeon Shin, Sungmook Lim
Life of this patent
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Abstract
A memory device includes a page buffer, a voltage generator, and a test controller. The page buffer is connected to a memory cell through a bit line, and is configured to sense a threshold voltage of the memory cell through a potential of a sensing node electrically connected to the bit line. The voltage generator is configured to generate a test voltage to be applied to the sensing node. The test controller is configured to control the voltage generator to apply the test voltage to the sensing node, and detect a defect of the page buffer, based on a leakage current value of the sensing node.
Claims15
A memory device comprising:
- a page buffer connected to a memory cell through a bit line, the page buffer configured to sense a threshold voltage of the memory cell through a potential of a sensing node electrically connected to the bit line;
- a voltage generator configured to generate a test voltage to be applied to the sensing node;
- and
- a test controller configured to apply the test voltage to the sensing node, disconnect a connection between the sensing node and the bit line while the test voltage is applied to the sensing node, and detect a defect of the page buffer, based on a leakage current value of the sensing node,
- wherein the test controller maintains a disconnection between the sensing node and the bit line after an application of the test voltage to the sensing node is finished.
A method for operating a memory device including a page buffer connected to a memory cell through a bit line, the method comprising:
- generating a test voltage;
- applying the test voltage to a sensing node electrically connected to the bit line to sense a threshold voltage of the memory cell in the page buffer;
- disconnecting a connection between the sensing node and the bit line while the test voltage is applied to the sensing node;
- maintaining a disconnection between the sensing node and the bit line after an application of the test voltage to the sensing node is finished;
- and
- detecting a defect of the page buffer, based on a leakage current value of the sensing node.
A page buffer comprising:
- a first switch connected between a bit line and a common sensing node;
- a second switch and a third switch, connected in series between a power node and a sensing node;
- a fourth switch connected between the common sensing node and the sensing node;
- and
- a fifth switch and a sixth switch, connected in series between a ground voltage node and the sensing node,
- wherein the page buffer applies a test voltage to the sensing node through the power node by turning off the first and sixth switches and turning on the second and third switches, and applies the test voltage to the common sensing node according to whether the fourth switch turns on.
Dependencies are inferred from the claim text.