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US 11,776,654 B2Granted
Fail bit repair solution determination method and device
AssigneeChangxin Memory Technologies, Inc.
InventorYui-Lang Chen
Life of this patent
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AssigneeChangxin Memory Technologies, Inc.
InventorYui-Lang Chen
Estimating the term…
Provided are a Fail Bit (FB) repair solution determination method and device, which are applied to a chip including multiple subdomains. The chip further includes Redundancy (RD) circuits, and the RD circuits are configured to repair FBs in the subdomains. The method includes that: after one or more available RD circuits are determined for a target FB presently to be repaired in a subdomain, a reliability value of each available RD circuit is acquired from an RD circuit reliability list, the RD circuit reliability list including reliability values of multiple RD circuits, and a repair solution for the target FB in the subdomain is determined according to the reliability value of the available RD circuit. The reliability value of the RD circuit is obtained by performing big data analysis on relationships between generated FBs and RD circuits where NFBs are located in the RD circuits.
A Fail Bit (FB) repair solution determination method, applied to a chip comprising a plurality of subdomains, the chip further comprising Redundancy (RD) circuits, and the RD circuits being configured to repair FBs in the subdomains, wherein the method comprises:
An electronic device, comprising a processor and a memory, wherein
A computer-readable nonvolatile storage medium, storing an instruction therein, the instruction running in a computer to enable the computer to:
Dependencies are inferred from the claim text.