Memory calibration device, system and method
AssigneeSTMicroelectronics International N.V.
InventorsTanmoy Roy, Anuj Grover
Life of this patent
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AssigneeSTMicroelectronics International N.V.
InventorsTanmoy Roy, Anuj Grover
Estimating the term…
A memory calibration system includes a memory array having a plurality of memory cells, a sensing circuit coupled to the memory array, and calibration circuitry. A pattern of test data is applied to the memory array in order to generate calibration information based on output provided by the first sensing circuit in response to the application of the pattern of test data to the memory array. The generated calibration information is stored in a distributed manner within memory cells of the memory array. Some of the generated calibration information may be combined with data values stored in the plurality of memory cells as part of one or more operations on the stored data values. The stored data values may be stored in an in-memory compute cluster of the memory array, such that operations on the stored data values include combining the multiple data values of the in-memory compute cluster with at least a portion of the generated calibration information as at least part of an in-memory compute operation for the in-memory compute cluster.
A memory calibration system, comprising:
A method for memory array calibration, the method comprising:
A computing device, comprising:
A non-transitory computer-readable medium having contents which cause a computing device to perform actions, the actions comprising:
Dependencies are inferred from the claim text.