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US 11,776,635 B2Granted
Method for finding optimum read voltage and flash memory system
AssigneeInnogrit Technologies Co., Ltd.
InventorsYoungjoon Choi, Hung-Chi Chiang
Life of this patent
Estimating the term…
Abstract
A method for finding an optimum read voltage includes acquiring difference values between state bit counts of different positions. A direction for finding the optimum read voltage is determined based on the difference values. An offset for finding the optimum read voltage is determined based on correspondence between a difference value of bit count and offset. Reading is performed with the offset applied to a current read reference voltage, wherein upon read-success, the current reference voltage superimposed with the offset is the optimum read voltage, and upon read-error, new first and second positions are obtained based on the direction and the offset for finding the optimum read voltage until reading becomes successful.
Claims11
A method for finding an optimum read voltage, the method comprising:
- acquiring a first difference value (R12) between a first state bit count of a first position (R1) and a first state bit count of a second position (R2), a second difference value (R1Δ(0-1)) between the first state bit count and a second state bit count at the first position, a third difference value (R23) between the first state bit count of the second position (R2) and a first state bit count of a third position (R3), and a fourth difference value (R2Δ(0-1)) between the first state bit count and the second state bit count at the second position within a threshold voltage region;
- determining a direction for finding the optimum read voltage based on the difference values, and determining an offset for finding the optimum read voltage based on correspondence between a difference value of bit count and offset;
- and
- reading with the offset applied to a current read reference voltage, wherein, upon read-success, the current reference voltage superimposed with the offset is the optimum read voltage, and upon read-error, a new first position and a new second position are obtained based on the direction and the offset for finding the optimum read voltage until reading becomes successful.
1 more element
A method for finding an optimum read voltage, the method comprising:
- acquiring a first difference value (R12) between a first state bit count of a first position (R1) and a first state bit count of a second position (R2), a second difference value (R1Δ(0-1)) between the first state bit count and a second state bit count at the first position, and a third difference value (R2Δ(0-1)) between the first state bit count and the second state bit count at the second position within a threshold voltage region;
- determining a direction for finding the optimum read voltage based on the difference values and a preset summit threshold (ST), wherein:
- if the first difference (R12) is smaller than the summit threshold (ST), an offset for finding the optimum read voltage is determined based on correspondence between the first difference value (R12) and offset;
- and
- if the first difference (R12) is greater than or equal to summit threshold (ST), a third position is calculated according to the first difference value (R12), second difference value (R1Δ(0-1)) and the third difference value (R2Δ(0-1)), a first state bit count of the third position (R3) is read, and a fourth difference value (R23) between the first state bit count of the second position (R2) and the first state bit count of the third position (R3) or a fifth difference value (R13) between the first state bit count of the first position (R1) and the first state bit count of the third position (R3) is acquired, and an offset for finding the optimum read voltage is determined based on correspondence between a difference value of bit count and offset;
- and
- reading with the offset applied to a current read reference voltage, wherein, upon read-success, the current reference voltage superimposed with the offset is the optimum read voltage, and upon read-error, a new first position and a new second position are obtained based on the direction and the offset for finding the optimum read voltage until reading becomes successful.
4 more elements
A flash memory system, comprising:
- a counter configured to acquire a first difference value (R12) between a first state bit count of a first position (R1) and a first state bit count of a second position (R2), a second difference value (R1Δ(0-1)) between the first state bit count and a second state bit count at the first position, a third difference value (R23) between the first state bit count of the second position (R2) and a first state bit count of a third position (R3), and a fourth difference value (R2Δ(0-1)) between the first state bit count and the second state bit count at the second position within a threshold voltage region;
- and
- control logic configured to:
- determine a direction for finding an optimum read voltage based on the difference values, and determining an offset for finding the optimum read voltage based on correspondence between a difference value of bit count and offset;
- and
- reading with the offset applied to a current read reference voltage, wherein, upon read-success, the current reference voltage superimposed with the offset is the optimum read voltage, and upon read-error, a new first position and a new second position are obtained based on the direction and the offset for finding the optimum read voltage until reading becomes successful.
3 more elements
Dependencies are inferred from the claim text.