Memory device including semiconductor element

A semiconductor memory device comprising:

• a columnar semiconductor body being extensive for a length and supported by a substrate, the columnar semiconductor body connecting to a first impurity region and a second impurity region located, respectively, at end portions of the length of the columnar semiconductor body, wherein the first and second impurity regions are doped with impurities to have an identical conductivity type;
• a first gate conductor layer and a second gate conductor layer formed separately from each other along the length of the columnar semiconductor body and arranged at least partially around the columnar semiconductor body;
• and
• at least one gate insulator provided to insulate the first and second gate conductor layers from the semiconductor columnar body,
• wherein the first and second gate conductor layers, the first impurity region and the second impurity region individually provide terminals of the semiconductor memory device, a set of data write biases is applied across the terminals to generate majority carriers, as memory data charges, inside the columnar semiconductor body by either an occurrence of an impact ionization phenomenon or by means a gate-induced drain leakage current, and a set of data erase biases is applied across the terminals to draw the majority carriers out of the columnar semiconductor body.