Sense amplifier and semiconductor memory device including the sense amplifier

A semiconductor memory device comprising:

• a memory cell array comprising a plurality of memory cells;
• a bit line sense amplifier comprising a first transistor and a second transistor configured to sense a potential difference between a bit line and a complementary bit line during a sensing operation for the plurality of memory cells;
• an active region crossed by a second conductive line electrically connecting the first transistor to the second transistor, the active region being separated from a first active of the first transistor and a second active of the second transistor;
• a gate pattern at least partially overlapping the second conductive line in a plan view and extending in a first direction in which the second conductive line extends;
• a first conductive line extending in the first direction without at least partially overlapping the gate pattern and the second conductive line;
• and
• a first contact electrically connected to the first conductive line and overlapping the first conductive line in a plan view and comprising a long side extending in the first direction and a short side extending in a second direction crossing the first direction,
• wherein the long side has a first width in the first direction, the short side has a second width in the second direction, and the first width is longer than the second width.

A semiconductor memory device comprising:

• a memory cell array comprising a plurality of memory cells configured to store data;
• a bit line sense amplifier comprising a first transistor and a second transistor configured to sense a potential difference between a first potential of a bit line and a second potential of a complementary bit line during a sensing operation for the plurality of memory cells;
• a local sense amplifier configured to receive the first potential and the second potential from the bit line sense amplifier and provide data to a global input/output line, the local sense amplifier being disposed between the first transistor and the second transistor,
• wherein the local sense amplifier comprises:
• an active region;
• a plurality of gate patterns disposed on the active region so as to at least partially overlap a second conductive line electrically connecting the first transistor to the second transistor;
• a first contact disposed between the plurality of gate patterns and comprising a long side extending in a first direction in which the second conductive line extends and a short side extending in a second direction crossing the first direction;
• and
• a first conductive line electrically connected to the first contact while overlapping the first contact in a plan view and comprising a first conductive region extending in the first direction,
• wherein the long side has a first width in the first direction, the short side has a second width in the second direction, and the first width is longer than the second width.