Register transfer level navigation microservices and instrumentation for cloud-native electronic design automation (EDA) platforms

A computer comprising:

• a memory;
• a non-transitory computer readable medium including computer executable instructions;
• and
• at least one processor, coupled to the memory and the non-transitory computer readable medium, and operative to execute the instructions to be operative to increase the efficiency of electronic design automation by:
• instantiating a register transfer level debug application client entity;
• the register transfer level debug application client entity requesting, from a register transfer level source navigator server, combined register transfer level and hardware aspect metadata including debug instrumentation;
• the register transfer level debug application client entity receiving, from the register transfer level source navigator server, the combined register transfer level and hardware aspect metadata including the debug instrumentation;
• the register transfer level debug application client entity transforming the combined register transfer level and hardware aspect metadata including the debug instrumentation;
• and
• the register transfer level debug application client entity rendering the transformed combined register transfer level and hardware aspect metadata including the debug instrumentation, wherein, in the requesting and receiving steps, the combined register transfer level and hardware aspect metadata characterizes a register transfer level abstraction of an integrated circuit including human-written code defining a logic design and machine-generated code addressing design aspects to provide data to enable reverse-engineering of the transformation of the hardware logic and, subsequently, re-engineering of the reverse-engineered design.

A computer program product for increasing the efficiency of electronic design automation, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer to cause the computer to:

• instantiate a register transfer level debug application client which:
• requests, from a register transfer level source navigator server, combined register transfer level and hardware aspect metadata including debug instrumentation;
• receives, from the register transfer level source navigator server, the combined register transfer level and hardware aspect metadata including the debug instrumentation;
• transforms the combined register transfer level and hardware aspect metadata including the debug instrumentation;
• and
• renders the transformed combined register transfer level and hardware aspect metadata including the debug instrumentation, wherein, in the requesting and receiving steps, the combined register transfer level and hardware aspect metadata characterizes a register transfer level abstraction of an integrated circuit including human-written code defining a logic design and machine-generated code addressing design aspects to provide data to enable reverse-engineering of the transformation of the hardware logic and, subsequently, re-engineering of the reverse-engineered design.