System and method for supporting multiple independent silicon-rooted trusts per system-on-a-chip

A method comprising:

• storing a first group of keys associated with a first entity in a first slot of a plurality of one-time programmable slots, wherein the one-time programmable slots are within a programmable read only memory of a security chip of a compute device of an information handling system;
• storing a second group of keys associated with a second entity in a second slot of the one-time programmable slots;
• storing an owner group of keys associated with an owner entity in an owner slot of the one-time programmable slots, wherein the owner slot is not able to be invalidated;
• associating each of a plurality of entries within a one-time programmable slot counter with a different one of the one-time programmable slots, wherein the one-time programmable slot counter is only able to count in one direction;
• and
• incrementing a first entry of the entries to invalidate the second group of keys associated with the second entity.

An information handling system comprising:

• a compute device including:
• a memory to store a plurality of sets of code to be executed during a boot operation of the compute device, wherein only one code of the sets of code is stored in the memory at a time;
• a security chip including a processor to communicate with the memory, the security chip further including a programmable read only memory, the programmable read only memory including:
• a plurality of one-time programmable slots including first and second slots and an owner slot, the first slot to store a first group of keys for a first entity of the security chip, wherein first code within the memory is associated with the first entity, and the first code only enables the first entity to both store groups of keys in the one-time programmable slots and invalidate the groups of keys;
• the second slot to store a second group of keys for a second entity of the security chip, wherein second code within the memory is associated with the second entity, the second code to enable the second entity to access peripherals connected to the compute device;
• and the owner slot to store an owner group of keys associated with an owner entity of the security chip, wherein the owner slot is not able to be invalidated;
• and
• a one-time programmable slot counter including a plurality of entries, wherein each of the entries is associated with a different one of the one-time programmable slots, wherein the one-time programmable slot counter is only able to count in one direction, wherein a first entry of the entries is updated to invalidate the second group of keys associated with the second entity.