Memory device and method of manufacturing the same

A semiconductor device comprising:

• a substrate;
• a driving circuit area disposed on the substrate;
• a plurality of word lines extending in a first direction disposed on the driving circuit area, and including a first word line and a second word line spaced in parallel apart from each other in a second direction perpendicular to the first direction;
• a plurality of bit lines extending in the second direction disposed on the word lines, and including a first bit line and a second bit line spaced in parallel apart from each other in the first direction;
• a memory cell array area including a plurality of memory pillars respectively arranged at cross points between the plurality of bit lines and the plurality of first word lines, each of the plurality of memory pillars including a selection device and a variable resistance layer;
• a plurality of insulating patterns disposed between two adjacent memory pillars among the plurality of memory pillars;
• and
• a first capping layer disposed in a recessed portion of each of the variable resistance layers,
• wherein the recessed portion has a first sloped profile directing toward an inner side from an upper portion to a middle portion and a second sloped profile directing toward an outer side from the middle portion to a lower portion.