Methods and circuits for decision-feedback equalization with early high-order-symbol detection
AssigneeRambus Inc.
InventorsMasum Hossain, Nhat Nguyen, Charles Walter Boecker
Life of this patent
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Abstract
A PAM-4 DFE receives an input signal distorted by inter-symbol interference (ISI) and expressing a series of symbols each representing one of four pulse amplitudes to convey two binary bits of data per symbol. High-order circuitry resolves the most-significant bit (MSB) of each two-bit symbol, whereas low-order circuitry 115 resolves the immediate least-significant bit (LSB). An immediate value of the MSB is used to select a set of ISI offsets used to resolve the LSB. Resolved values of the prior values of the MSB and LSB are then used to select the ISI offset for the immediate symbol.
Claims19
A decision-feedback equalizer (DFE) comprising:
- an input node configured to receive an input signal expressing a series of symbols, each of the symbols representing a symbol value having a high-order bit and a low-order bit, the series of symbols including an immediate symbol representing an immediate-symbol value and a prior symbol representing a prior-symbol value;
- high-order circuitry coupled to the input node to receive the series of symbols, the high-order circuitry configured to resolve the high-order bit of the immediate symbol;
- and
- low-order circuitry coupled to the input node to receive the series of symbols, the low-order circuitry configured to resolve the low-order bit of the immediate-symbol value based on the high-order bit of the immediate-symbol value and the prior-symbol value.
A method for resolving an input signal expressing a series of symbols, each of the symbols expressed over a symbol time and representing a symbol value having a high-order bit and a low-order bit, the series of symbols including an immediate symbol representing an immediate-symbol value and a prior symbol representing a prior-symbol value, the method comprising:
- sampling the immediate symbol to produce first and second tentative high-order samples;
- sampling the immediate symbol to produce first and second tentative low-order samples;
- selecting one of the first and second tentative high-order samples as the high-order bit of the immediate-symbol value based on the prior-symbol value;
- and
- selecting one of the first and second tentative low-order samples based on the high-order bit of the immediate-symbol value.
A receiver comprising:
- an input node configured to receive an input signal expressing a series of symbols, each of the symbols representing a symbol value having a high-order bit and a low-order bit, the series of symbols including an immediate symbol representing an immediate-symbol value and a prior symbol representing a prior-symbol value;
- high-order circuitry configured to select the high-order bit of the immediate-symbol value;
- and
- means for selecting the low-order bit of the immediate-symbol value based on the high-order bit of the immediate-symbol value.
Dependencies are inferred from the claim text.