Encoder and decoder of forward error correction (FEC) codec

A communication device, comprising:

• a set of multiple forward error correction (FEC) encoders, each FEC encoder receiving an input message as a part of an input string to the communication device;
• and
• wherein a FEC encoder is further arranged to divide the input message to the FEC encoder into multiple input substrings to feed into one or more port encoders of the FEC encoder in multiple clock cycles to generate a check byte for the input message to the FEC encoder, wherein an input substring at a current clock cycle includes a current set of input bytes of the message for the current clock cycle, and wherein a port encoder of the one or more port encoders includes:
• a set of multiple Galois field multipliers to generate a set of multiple Galois field products based on the current set of input bytes of the message and a set of multiple powers of an alpha, a Galois field product of the set of multiple Galois field products is a Galois field product of an input byte of the current set of input bytes, and a power of the alpha selected from the set of multiple powers of the alpha, and wherein the alpha is a unit root of a primitive polynomial over a Galois field;
• one or more Galois field adders coupled to the set of multiple Galois field multipliers to generate a Galois field summation of the set of multiple Galois field products as a consolidated byte for the current clock cycle;
• and
• a storage unit to store a staged result for the current clock cycle, accumulated based on previous sets of input bytes of the message for all clock cycles from a first clock cycle to a clock cycle immediately prior to the current clock cycle, wherein the check byte for the input message to the FEC encoder is generated based on the consolidated byte for the current clock cycle and the staged result stored in the storage unit of the port encoder.

A method for a forward error correction (FEC) codec to generate a check byte for a message, comprising:

• receiving, at a current clock cycle by a port encoder of the FEC codec, a current set of input bytes of the message to the port encoder;
• generating a consolidated byte for the current clock cycle, wherein the consolidated byte is a Galois field summation of a first set of multiple Galois field products generated based on the current set of input bytes and a first set of multiple powers of an alpha, a Galois field product of the first set of multiple Galois field products is a Galois field product of an input byte of the current set of input bytes, and a power of the alpha selected from the first set of multiple powers of the alpha;
• providing, at the current clock cycle, from a storage unit of the port encoder, a first staged result accumulated based on previous sets of input bytes of the message for all clock cycles from a first clock cycle to a clock cycle immediately prior to a current clock cycle;
• performing, by a Galois field multiplier of the port encoder, a Galois field multiplication of the first staged result and a second power of the alpha to generate a second Galois field product for the current clock cycle;
• and
• performing, by a sum unit of the port encoder, a Galois field addition on an internal input based on the consolidated byte for the current clock cycle and the second Galois field product to generate and store a second staged result in the storage unit, for subsequent use to generate the check byte;
• wherein the alpha is a unit root of a primitive polynomial over a Galois field.