Light-emitting diode packaging structure and method for fabricating the same

A method for fabricating a light-emitting diode packaging structure comprising:

• providing a semiconductor wafer, wherein the semiconductor wafer comprises a plurality of semiconductor substrates;
• penetrating through each of the plurality of semiconductor substrates to form a first through hole and three second through holes, wherein each of the second through holes comprises a first sub-through hole and a second sub-through hole communicating with the first sub-through hole, the first sub-through hole and the second sub-through hole are respectively formed close to a top surface and a bottom surface of the semiconductor substrate, and a cross-sectional area of the first sub-through hole is larger than a cross-sectional area of the second sub-through hole;
• forming an insulation layer on a surface of each of the plurality of semiconductor substrates and inner surfaces of the first through hole, the first sub-through hole, and the second sub-through hole;
• forming a first patterned electrode layer on the top surface of the semiconductor substrate;
• forming a conductive material that covers the insulation layer in the first through hole and the second sub-through hole and electrically connecting the conductive material to the first patterned electrode layer;
• forming a second patterned electrode layer on the bottom surface of the semiconductor substrate and electrically connecting the second patterned electrode layer to the conductive material within the first through hole and the second sub-through holes;
• respectively forming three light-emitting diodes in the first sub-through holes of the second through holes of each of the plurality of semiconductor substrates and respectively electrically connecting the light-emitting diodes to the conductive material within the second sub-through holes;
• and
• separating from the plurality of semiconductor substrates;
• each of the light-emitting diodes comprises:
• a metal combined substrate comprising a first metal layer and two second metal layers, the second metal layers are respectively formed on a top surface and a bottom surface of the first metal layer, the first metal layer comprises a nickel-iron alloy, the second metal layers comprise copper, a ratio of the second metal layer to the first metal layer to the second metal layer of the metal combined substrate in thickness is 1:2.5˜3.5:1, and the metal combined substrate is formed in the first sub-through hole;
• an epitaxial electrode layer formed on the metal combined substrate and formed in the first sub-through hole;
• an electrode unit formed on the epitaxial electrode layer and formed in the first sub-through hole;
• and
• a transparent conductive layer, covering the metal combined substrate, the conductive material, the epitaxial electrode layer, the electrode unit, and the first patterned electrode layer, electrically connected to the conductive material, the electrode unit, and the first patterned electrode layer.