Gate trench power semiconductor devices having improved deep shield connection patterns

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other;
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the connection region comprises an upper portion that overlaps at least a portion of the first gate structure or the second gate structure.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall,
• wherein the first gate structure and the second gate structure are spaced apart from each other in a first direction, and
• wherein an upper portion of the connection region has a first width in the first direction, and the first width is greater than a distance between the first gate structure and the second gate structure in the first direction.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the deep shielding region protrudes beyond the outer sidewalls of the first and second gate structures and comprises portions that the first and second gate structures do not vertically overlap.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other;
• and
• a first bottom dielectric layer between the first gate structure and the deep shielding region and a second bottom dielectric layer between the second gate structure and the deep shielding region,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• each of the first and second gate structures comprises a gate dielectric layer defining the outer sidewall, an inter-gate dielectric layer defining the inner sidewall, and a gate electrode between the gate dielectric layer and the inter-gate dielectric layer,
• wherein the gate dielectric layer comprises a material different from the first and second bottom dielectric layers.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the semiconductor layer structure comprises:
• a first protrusion on the outer sidewall of the first gate structure;
• and
• a second protrusion on the outer sidewall of the second gate structure,
• wherein each of the first and second protrusions comprises a well region having the second conductivity type and a source region having the first conductivity type in an upper portion of the well region, and
• the source region encloses the well region in plan view.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the first gate structure extends longitudinally in a first direction, and the second gate structure comprises a plurality of second gate structures that are spaced apart from each other in the first direction and are collinear, and
• wherein the connection region extends between the first gate structure and the plurality of second gate structures and comprises a plurality of protrusions protruding from the connection region in a second direction that is perpendicular to the first direction, and each of the plurality of protrusions of the connection region separates two adjacent second gate structures.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the connection region comprises a plurality of protrusions, and each of the plurality of protrusions protrudes into the first gate structure or the second gate structure.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region, the connection region comprising a semiconductor material that separates the first gate structure and the second gate structure from each other,
• wherein each of the first and second gate structures comprises an inner sidewall adjacent the connection region and an outer sidewall opposite the inner sidewall, and
• wherein the connection region and the deep shielding region comprise second conductivity type dopants, a dopant concentration of the connection region is greater than a dopant concentration of the deep shielding region.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in a gate trench in an upper portion of the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a connection region protruding from the deep shielding region and separating the first gate structure and the second gate structure from each other,
• wherein the deep shielding region is a single deep shielding region, and each of the first and second gate structures vertically overlaps the deep shielding region,
• wherein the deep shielding region protrudes beyond sidewalls of the gate trench.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure that comprises a first gate electrode and a first gate dielectric layer and in the semiconductor layer structure an adjacent second gate structure that comprises a second gate electrode and a second gate dielectric layer in the semiconductor layer structure;
• a deep shielding region in the drift region, the deep shielding region beneath the first gate structure and the second gate structure, the deep shielding region having a second conductivity type that is different from the first conductivity type;
• a first bottom dielectric layer between the first gate structure and the deep shielding region and a second bottom dielectric layer between the second gate structure and the deep shielding region;
• and
• a connection region extending between the first gate structure and the second gate structure,
• wherein the first gate structure and the second gate structure are spaced apart from each other in a first direction, and
• the connection region protrudes from a center portion of a top surface of the deep shielding region,
• wherein the first gate dielectric layer comprises a material different from the first bottom dielectric layer and the second gate dielectric layer comprises a material different from the second bottom dielectric layer.

A power semiconductor device comprising:

• a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material, the drift region having a first conductivity type;
• a first gate structure and an adjacent second gate structure in a first gate trench in the semiconductor layer structure;
• a first deep shielding region in the drift region, the first deep shielding region beneath the first gate structure and the second gate structure, the first deep shielding region having a second conductivity type that is different from the first conductivity type;
• and
• a first connection region protruding from the first deep shielding region, the first connection region comprising a first semiconductor material that separates the first gate structure and the second gate structure from each other,
• a third gate structure and an adjacent fourth gate structure in a second gate trench in the semiconductor layer structure;
• a second deep shielding region in the drift region, the second deep shielding region beneath the third gate structure and the fourth gate structure, the second deep shielding region having the second conductivity type;
• and
• a second connection region protruding from the second deep shielding region, the second connection region comprising a second semiconductor material that separates the third gate structure and the fourth gate structure from each other,
• wherein the first gate trench is adjacent the second gate trench.