Integrated circuit with active region jogs

An integrated circuit (IC) structure, comprising:

• a first transistor comprising a first gate and first source/drain regions on opposite sides of the first gate;
• a second transistor comprising a second gate and second source/drain regions on opposite sides of the second gate;
• and
• an isolation region between the first transistor and the second transistor, wherein from a top view the isolation region has a first portion bordering a vertical side of a first one of the first source/drain regions and a vertical side of a first one of the second source/drain regions, and a second portion bordering a horizontal side of the first one of the first source/drain regions and a horizontal side of the first one of the second source/drain regions.

An IC structure, comprising:

• a first transistor comprising a first gate and first source/drain regions on opposite sides of the first gate;
• a second transistor comprising a second gate and second source/drain regions on opposite sides of the second gate;
• and
• an isolation structure between the first transistor and the second transistor, wherein the isolation structure comprises:
• a first top-view profile having a first side and a second side opposing the first side;
• and
• a second top-view profile having a third side and a fourth side opposing the third side, wherein a width between the first side and the second side is smaller than a width between the third side and the fourth side.