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US 11,769,765 B2Granted
Gate dielectric layer protection
AssigneeMicron Technology, Inc.
InventorYoshikazu Moriwaki
Life of this patent
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Abstract
Apparatuses with a gate electrode in a semiconductor device are described. An example apparatus includes an active region, an isolation region surrounding the active region, a dielectric layer including a first portion above the active region and a second portion above the isolation region, and a protection layer on the isolation region.
Claims17
An apparatus comprising:
- an active region;
- an isolation region surrounding the active region;
- a dielectric layer including a first portion above the active region and a second portion above the isolation region;
- and
- a protection layer between the isolation region and the dielectric layer, wherein an elevation of the second portion of the dielectric layer is higher than an elevation of the first portion of the dielectric layer.
2 more elements
An apparatus comprising:
- a first transistor including:
- a first gate;
- and
- a first active region;
- a second transistor including:
- a second gate;
- and
- a second active region;
- a gate electrode including the first gate of the first transistor and the second gate of the second transistor;
- an isolation region between the first active region and the second active region;
- and
- a protection layer disposed between the isolation region and the gate electrode,
- wherein the first active region comprises a first edge adjacent to a first side of the isolation region and the second active region comprises a second edge adjacent to a second side of the isolation region,
- wherein the second side is opposite the first side,
- wherein the protection layer is configured to extend across the isolation region from the first side of the first active region to the second side of the second active region, and
- wherein the protection layer is configured to cover an entirety of the isolation region.
13 more elements
Dependencies are inferred from the claim text.