Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsAe-Nee Jang, KyungSeon Hwang, SunWon Kang
Life of this patent
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Abstract
A semiconductor package includes a substrate, through-electrodes penetrating the substrate, first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate and electrically connected to the through-electrodes, respectively, and at least one second bump disposed between the first bumps and electrically insulated from the through-electrodes. The first bumps and the at least one second bump constitute one row in the first direction. A level of a bottom surface of the at least one second bump from the top surface of the substrate is a substantially same as levels of bottom surfaces of the first bumps from the top surface of the substrate.
Claims20
A semiconductor package, comprising:
- a substrate;
- through-electrodes penetrating the substrate;
- first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate, the first bumps being electrically connected to the through-electrodes, respectively;
- at least one second bump disposed between the first bumps, the at least one second bump being electrically floated;
- and
- an underfill covering the substrate, the first bumps, and the at least one second bump,
- wherein the first bumps and the at least one second bump constitute one row in the first direction, and
- wherein the at least one second bump is disposed at a higher level from the substrate than the first bumps.
A semiconductor package, comprising:
- a substrate;
- through-electrodes penetrating the substrate;
- an insulating pattern on the substrate, the insulating pattern having through-holes exposing the through-electrodes, respectively;
- first bumps disposed on the substrate, and connected to the through-electrodes via the through-holes, respectively;
- at least one second bump disposed on the insulating pattern, and disposed between the first bumps immediately adjacent to each other, an entire bottom of the at least one second bump being in contact with the insulating pattern and not electrically connected to any through-electrodes;
- and
- an underfill covering the substrate, the insulating pattern, the first bumps, and the at least one second bump,
- wherein the at least one second bump is electrically insulated from the through-electrodes by the insulating pattern.
A semiconductor package, comprising:
- a substrate;
- through-electrodes penetrating the substrate;
- first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate, the first bumps being electrically connected to the through-electrodes, respectively;
- at least one second bump disposed between the first bumps, the at least one second bump being electrically insulated from the through-electrodes;
- an insulating pattern between the substrate and the at least one second bump;
- and
- an underfill covering the substrate, the first bumps, and the at least one second bump,
- wherein the first bumps and the at least one second bump constitute one row in the first direction,
- wherein the at least one second bump is disposed at a higher level from the substrate than the first bumps, and
- wherein the through-electrodes are only connected to the first bumps from among the first and second bumps.
Dependencies are inferred from the claim text.