US 11,769,742 B2 · Semiconductor chip and semiconductor package including the same

Abstract

Disclosed embodiments include a semiconductor chip including a semiconductor substrate having a top surface with a top connection pad disposed therein, and a protection insulation layer comprising an opening therein, the protection insulation layer not covering at least a portion of the top connection pad, on the semiconductor substrate. The protection insulation layer may include: a bottom protection insulation layer, a cover insulation layer comprising a side cover part that covers at least a portion of a side surface of the bottom protection insulation layer and a top cover part disposed apart from the side cover part to cover at least a portion of a top surface of the bottom protection insulation layer. The protection insulation layer may further include a top protection insulation layer on the top cover part.

Claims20

Dependent claims

A method of manufacturing a semiconductor chip, the method comprising:

preparing a semiconductor substrate;
forming a top connection pad in a top surface;
and
forming a protection insulation layer having an opening therein, the protection insulation layer not covering at least a portion of the top connection pad, on the semiconductor substrate,
wherein the protection insulation layer includes:
a bottom protection insulation layer,
a cover insulation layer comprising a side cover part that covers at least a portion of a side surface of the bottom protection insulation layer and a top cover part disposed apart from the side cover part to cover at least a portion of a top surface of the bottom protection insulation layer, and
a top protection insulation layer formed of a photosensitive polyimide, and disposed on the top cover part.

5 more elements

A method of manufacturing a semiconductor chip, the method comprising:

preparing a semiconductor substrate;
forming a top connection pad in a top surface;
forming a barrier layer on the top connection pad, forming a bottom protection insulation layer on the semiconductor substrate and the barrier layer;
forming an opening exposing at least a portion of the top connection pad by removing a portion of the bottom protection insulation layer and a portion of the barrier layer;
forming a cover insulation layer on a side surface of the bottom protection insulation layer and a side surface of the barrier layer and a portion of the top surface of the top connection pad in the opening, and a top surface of the bottom protection insulation layer;
forming a top protection insulation layer covering a portion of the cover insulation layer;
removing a portion of the cover insulation layer to form a side cover part that covers at least a portion of a side surface of the bottom protection insulation layer and a top cover part disposed apart from the side cover part to cover at least a portion of a top surface of the bottom protection insulation layer by using the top protection insulation layer as an etch mask;
and
forming a connection terminal on the top surface of the top connection pad.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor chip and semiconductor package including the same

Life of this patent

Semiconductor chip and semiconductor package including the same

Life of this patent

Abstract

Claims20