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US 11,769,718 B2Granted
Packages with Si-substrate-free interposer and method forming same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Fa Chen, Chen-Hua Yu
Life of this patent
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Abstract
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
Claims20
A method comprising:
- forming a first plurality of dielectric layers over a carrier, wherein the first plurality of dielectric layers comprise polymers;
- forming a plurality of redistribution lines in the first plurality of dielectric layers;
- depositing a second plurality of dielectric layers, wherein the second plurality of dielectric layers comprise low-k dielectric materials;
- forming a plurality of metal lines and vias in the second plurality of dielectric layers, wherein the plurality of metal lines and vias are formed through damascene processes, wherein at a time the plurality of metal lines and vias are formed, the second plurality of dielectric layers are over the carrier;
- bonding a first device die over and electrically coupling to the plurality of metal lines and vias;
- encapsulating the first device die in a gap-filling dielectric material;
- and
- de-bonding the first plurality of dielectric layers from the carrier.
5 more elements
A method comprising:
- forming a first plurality of dielectric layers over a carrier, wherein the first plurality of dielectric layers comprise polymers;
- forming a first plurality of redistribution lines extending into the first plurality of dielectric layers;
- forming a second plurality of dielectric layers over the first plurality of dielectric layers, wherein the second plurality of dielectric layers are formed of inorganic dielectric materials;
- forming a plurality of metal lines and vias in the second plurality of dielectric layers through damascene processes, wherein the plurality of metal lines and vias are formed over the carrier;
- forming a through-dielectric via penetrating through the second plurality of dielectric layers;
- forming solder regions physically contacting some of the first plurality of redistribution lines;
- bonding a first device die over and electrically connecting to the metal lines, wherein the first device die is electrically connected to the solder regions through the first plurality of redistribution lines and the through-dielectric via;
- thinning the first device die to expose through-silicon vias in the first device die;
- bonding a second device die over the first device die;
- encapsulating the second device die in a gap-filling material;
- etching the gap-filling material to reveal a metal pad;
- and
- bonding a third device die to the metal pad, wherein the third device die extends into the gap-filling material.
10 more elements
A method comprising:
- forming a first plurality of dielectric layers over a carrier, wherein the first plurality of dielectric layers comprises polymers;
- forming a plurality of redistribution lines in the first plurality of dielectric layers;
- depositing a second plurality of dielectric layers over the first plurality of dielectric layers, wherein the second plurality of dielectric layers comprise inorganic dielectric materials;
- forming a plurality of metal lines and vias in the second plurality of dielectric layers, wherein the plurality of metal lines and vias are formed through damascene processes, and wherein at a time the plurality of metal lines and vias are formed, the second plurality of dielectric layers are over the carrier;
- after both of the plurality of redistribution lines and the plurality of metal lines and vias are formed, bonding a first device die over the plurality of metal lines and vias;
- de-bonding the first plurality of dielectric layers from the carrier;
- and
- forming solder regions contacting some of the plurality of redistribution lines, wherein the first device die is electrically coupled to the solder regions through the metal lines and the vias.
5 more elements
Dependencies are inferred from the claim text.