Memory device and operating method thereof
AssigneeSK hynix Inc.
InventorSeung Hyun Chung
Life of this patent
Estimating the term…
Abstract
A memory device which can perform various memory tests without increasing a size of the memory device. The memory device includes: a first pad for receiving external ROM data from a memory controller; a second pad for receiving an external clock signal corresponding to the external ROM data from the memory controller; and a control logic connected to the first pad and the second pad and configured to perform an operation corresponding to the external ROM data in response to the external clock signal in a test mode.
Claims19
A memory device comprising:
- a first pad configured to receive external ROM data from a memory controller, the external ROM data received from outside of the memory device;
- a second pad configured to receive an external clock signal corresponding to the external ROM data from the memory controller, the external clock signal received from outside of the memory device;
- and
- a control logic connected to the first pad and the second pad and configured to perform an operation corresponding to the external ROM data and in synchronization with the external clock signal in a test mode.
A method for operating a memory device, the method comprising:
- receiving external ROM data from a memory controller through a first pad, the external ROM data received from outside of the memory device;
- receiving an external clock signal corresponding to the external ROM data from the memory controller through a second pad, the external clock signal received from outside of the memory device;
- and
- performing an operation corresponding to the external ROM data, in synchronization with the external clock signal, in response to a test mode.
A memory device comprising:
- a ROM configured to store internal ROM data;
- a clock signal generator configured to generate an internal clock signal corresponding to the internal ROM data;
- a first pad configured to receive external ROM data from a memory controller;
- a second pad configured to receive an external clock signal corresponding to the external ROM data from the memory controller;
- and
- a control logic connected to the ROM, the clock signal generator, the first pad and the second pad and configured to perform one of an operation corresponding to the internal ROM data and an operation corresponding to the external ROM data according to an operation mode.
Dependencies are inferred from the claim text.