Back to results
US 11,769,564 B2Granted
Reduced-leakage apparatus for sampling electrical signals and associated methods
AssigneeSilicon Laboratories Inc.
InventorMohamed M. Elsayed
Life of this patent
Estimating the term…
Abstract
An apparatus includes a sample-and-hold (S/H) circuit. The S/H circuit includes a first switch coupled to provide an input signal to be sampled, and a second switch coupled to the first switch and to a first capacitor. The S/H circuit further includes a third switch coupled to the second switch and to a second capacitor, and a fourth switch to selectively couple to ground a node between the first and second switches.
Claims20
An apparatus, comprising:
- first and second metal oxide semiconductor field effect transistors (MOSFETs) coupled in cascade to selectively provide power to a circuit;
- and
- a native transistor coupled to provide a gate voltage of the second MOSFET and wherein a gate of the native transistor is driven by a drain of the second MOSFET.
An apparatus, comprising:
- first and second metal oxide semiconductor field effect transistors (MOSFETs) coupled in cascade to selectively provide power to a circuit and
- a native transistor coupled to provide a gate voltage of the second MOSFET,
- wherein a source of the second MOSFET has a voltage equal to a threshold voltage of the native transistor plus a threshold voltage of the second MOSFET.
A method of selectively providing power to a circuit, the method comprising:
- using first and second metal oxide semiconductor field effect transistors (MOSFETs) coupled in cascade to selectively provide power to the circuit;
- using a native transistor to provide a gate voltage of the second MOSFET;
- and
- driving a gate of the native transistor by a drain of the second MOSFET.
1 more element
Dependencies are inferred from the claim text.