Stable memory cell identification for hardware security
AssigneeRegents of the University of Minnesota
InventorsMuqing Liu, Chen Zhou, Keshab K. Parhi, Hyung-il Kim
Life of this patent
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Abstract
A method includes setting an output of each memory cell in an array of memory cells to a same first value, decreasing power to the array of memory cells and then increasing power to the array of memory cells. Memory cells in the array of memory cells with outputs that switched to a second value different from the first value are then identified in response to decreasing and then increasing the power. A set of memory cells is then selected from the identified memory cells to use in hardware security.
Claims13
A method comprising:
- identifying a plurality of memory cells that all provide consistent outputs in response to decreasing power and then increasing power through steps comprising:
- setting an output of each memory cell in an array of memory cells to a same first value;
- decreasing power to the array of memory cells;
- increasing power to the array of memory cells;
- and
- after increasing the power to the array of memory cells, identifying all memory cells in the array of memory cells whose outputs switched to a second value different from the first value as being in the plurality of memory cells that all provide consistent outputs in response to decreasing power and then increasing power, wherein the memory cells are identified as providing consistent outputs without requiring multiple decreases and increases in power to the array of memory cells;
- and
- selecting from the plurality of memory cells that all provide consistent outputs in response to decreasing power and then increasing power, a set of memory cells to use in hardware security.
A method of identifying stable memory cells comprising:
- reducing power to a set of memory cells for a time period and then increasing power to the set of memory cells, wherein the time period limits how many memory cells have different output values after the power is increased compared to before the power is reduced by retaining data remanence in at least one memory cell;
- storing the addresses of all memory cells that had different output values after the power is increased compared to before the power is reduced as stable memory cells without requiring multiple decreases and increases in power to the set of memory cells;
- and
- selecting the stable memory cells to use in a hardware security task.
Dependencies are inferred from the claim text.